/*-------------------------------------------------------------------------------------------------*/
/*                                                                                                 */
/* Copyright (c) 2008 Nuvoton Technology. All rights reserved.                                     */
/* All rights reserved                                                                             */
/*                                                                                                 */
/*-------------------------------------------------------------------------------------------------*/
/* File Name:                                                                                      */
/*     NUC900_smartcard.h                                                                                 */
/* Description:                                                                                    */
/*     This file contains register API definition for smartcard driver                             */
/* History:                                                                                        */
/*                                                                                                 */
/* Project:                                                                                        */
/*-------------------------------------------------------------------------------------------------*/
#ifndef _NUVOTON_SC_H_
#define _NUVOTON_SC_H_

//#include "wblib.h"

#define    SCHI0_BA  0xB8005000 /* Smart Card Host Interface 0 Control */
#define	   SCHI1_BA	 0xB8005800 /* Smart Card Host Interface 1 Control */

#define SC_RBR			(0x00)
#define SC_TBR 			(0x00)
#define SC_IER			(0x04)
#define SC_ISR			(0x08)
#define SC_SCFR			(0x08)
#define SC_SCCR			(0x0c)
#define SC_CBR			(0x10)
#define SC_SCSR			(0x14)
#define SC_GTR			(0x18)
#define SC_ECR			(0x1c)
#define SC_TMR			(0x20)
#define SC_TOC			(0x28)
#define SC_TOIR0		(0x2c)
#define SC_TOIR1		(0x30)
#define SC_TOIR2		(0x34)
#define SC_TOD0			(0x38)
#define SC_TOD1			(0x3c)
#define SC_TOD2			(0x40)
#define SC_BTOR			(0x44)
/* BDLAB = 1 */
#define SC_BLL			(0x00)
#define SC_BLH			(0x04)
#define SC_SCIDNR		(0x08)

#define REG_SCHI_RBR0			(SCHI0_BA+SC_RBR)
#define REG_SCHI_TBR0			(SCHI0_BA+SC_TBR)
#define REG_SCHI_IER0			(SCHI0_BA+SC_IER)
#define REG_SCHI_ISR0			(SCHI0_BA+SC_ISR)
#define REG_SCHI_SCFR0			(SCHI0_BA+SC_SCFR)
#define REG_SCHI_SCCR0			(SCHI0_BA+SC_SCCR)
#define REG_SCHI_CBR0			(SCHI0_BA+SC_CBR)
#define REG_SCHI_SCSR0			(SCHI0_BA+SC_SCSR)
#define REG_SCHI_GTR0			(SCHI0_BA+SC_GTR)
#define REG_SCHI_ECR0			(SCHI0_BA+SC_ECR)
#define REG_SCHI_TMR0			(SCHI0_BA+SC_TMR)
#define REG_SCHI_TOC0			(SCHI0_BA+SC_TOC)
#define REG_SCHI_TOIR0_0		(SCHI0_BA+SC_TOIR0)
#define REG_SCHI_TOIR1_0		(SCHI0_BA+SC_TOIR1)
#define REG_SCHI_TOIR2_0		(SCHI0_BA+SC_TOIR2)
#define REG_SCHI_TOD0_0			(SCHI0_BA+SC_TOD0)
#define REG_SCHI_TOD1_0			(SCHI0_BA+SC_TOD1)
#define REG_SCHI_TOD2_0			(SCHI0_BA+SC_TOD2)
#define REG_SCHI_BTOR_0			(SCHI0_BA+SC_BTOR)
#define REG_SCHI_BLL_0			(SCHI0_BA+SC_BLL)
#define REG_SCHI_BLH_0			(SCHI0_BA+SC_BLH)
#define REG_SCHI_ID_0			(SCHI0_BA+SC_SCIDNR)

#define REG_SCHI_RBR1			(SCHI1_BA+SC_RBR)
#define REG_SCHI_TBR1			(SCHI1_BA+SC_TBR)
#define REG_SCHI_IER1			(SCHI1_BA+SC_IER)
#define REG_SCHI_ISR1			(SCHI1_BA+SC_ISR)
#define REG_SCHI_SCFR1			(SCHI1_BA+SC_SCFR)
#define REG_SCHI_SCCR1			(SCHI1_BA+SC_SCCR)
#define REG_SCHI_CBR1			(SCHI1_BA+SC_CBR)
#define REG_SCHI_SCSR1			(SCHI1_BA+SC_SCSR)
#define REG_SCHI_GTR1			(SCHI1_BA+SC_GTR)
#define REG_SCHI_ECR1			(SCHI1_BA+SC_ECR)
#define REG_SCHI_TMR1			(SCHI1_BA+SC_TMR)
#define REG_SCHI_TOC1			(SCHI1_BA+SC_TOC)
#define REG_SCHI_TOIR0_1		(SCHI1_BA+SC_TOIR0)
#define REG_SCHI_TOIR1_1		(SCHI1_BA+SC_TOIR1)
#define REG_SCHI_TOIR2_1		(SCHI1_BA+SC_TOIR2)
#define REG_SCHI_TOD0_1			(SCHI1_BA+SC_TOD0)
#define REG_SCHI_TOD1_1			(SCHI1_BA+SC_TOD1)
#define REG_SCHI_TOD2_1			(SCHI1_BA+SC_TOD2)
#define REG_SCHI_BTOR_1			(SCHI1_BA+SC_BTOR)
#define REG_SCHI_BLL_1			(SCHI1_BA+SC_BLL)
#define REG_SCHI_BLH_1			(SCHI1_BA+SC_BLH)
#define REG_SCHI_ID_1			(SCHI1_BA+SC_SCIDNR)


#define MAX_ATR_LEN					(33)
#define MAX_BUF_LEN					(500)
#define MAX_CMD_LEN					(262)	/* header : 5, data : 256(max), le : 1, plus all 262 */

#define SMARTCARD_NUM					2      // we have 2 interfaces

#define SC_IOC_ISCARDPRESENT				1		/* check card present */
#define SC_IOC_GETATR					2
#define SC_IOC_GETERRNO					3		/* get error number */


/* iso7816 operation class */
#define SC_ISO_OPERATIONCLASS_A				(0x01)
#define SC_ISO_OPERATIONCLASS_B				(0x02)

// Current card operation
#define SC_OP_NOP					(0x00)
#define SC_OP_READ					(0x01)
#define SC_OP_WRITE					(0x02)

// error code get from SC_IOC_GETERRNO
#define SC_ERR_CARD_REMOVED				-120
#define SC_ERR_OVER_RUN					-119
#define SC_ERR_PARITY_ERROR				-118
#define SC_ERR_NO_STOP					-117
#define SC_ERR_SILENT_BYTE				-116
#define SC_ERR_CMD						-115
#define SC_ERR_UNSUPPORTEDCARD			-114
#define SC_ERR_READ						-113
#define SC_ERR_WRITE					-112
#define SC_ERR_TIMEOUT             		-111

// These are the error code actually returns to user application
#define SC_EIO							(1| SMARTCARD_ERR_ID)
#define SC_ENODEV						(2| SMARTCARD_ERR_ID)
#define SC_ENOMEM						(3| SMARTCARD_ERR_ID)
#define SC_EBUSY						(4| SMARTCARD_ERR_ID)
#define SC_ENOTTY						(5| SMARTCARD_ERR_ID)




// Smartcard library APIs
extern INT32 SC_Init(VOID);
extern INT32 SC_Open(PVOID param);
extern INT32 SC_Close(INT32 fd);
extern INT32 SC_Read(INT32 fd, PUINT8 buf, UINT32 len);
extern INT32 SC_Write(INT32 fd, PUINT8 buf, UINT32 len);
extern INT32 SC_Ioctl(INT32 fd, UINT32 cmd, UINT32 arg0, UINT32 arg1);
extern INT32 SC_Exit(VOID);
//extern INT32 scProbe(PVOID dev);

#endif
